The present invention relates to a configurable configuration controller of an integrated circuit (“IC”), a boot program product for configuration of the configuration controller, and associated methods.
Some ICs have configuration elements that may be programmed or reprogrammed. Such ICs include field programmable gate arrays (“FPGAs”) (also sometimes referred to as programmable logic devices (“PLDs”), complex PLDs (“CPLDs”), programmable array logic (“PALs”), programmable logic arrays (“PLAs”), field PLAs (“FPLAs”), erasable PLDs (“EPLDs”), electrically erasable PLDs (“EEPLDs”) and logic cell arrays (“LCAs”)) and ICs, such as application specific integrated circuits (“ASICs”), that have traditionally been fixed. It is possible for the latter to have a portion or portions that are programmable.
With respect to FPGAs, a user who is designing a system typically uses the FPGA to implement a particular device design maximized for a particular system application. The design is implemented in the FPGA by what is commonly known as a programming output file (“POF”) which contains configuration data to configure the FPGA in accordance with the user's design. The FPGA is configured by loading the POF into configuration elements of the FPGA. This process is carried out after the POF has been loaded into a configuration memory device connected to the FPGA. Subsequently, upon startup of the FPGA, a configuration controller of the FPGA reads the POF from the configuration memory and loads it into the FPGA's configuration elements which are generally dispersed across the device.
At present, the configuration memory is typically housed in a separate memory chip such as a flash memory chip that is connected to the FPGA. Existing configuration controllers are typically implemented as a block of hardwired logic on the FPGA itself. This implementation means that the configuration steps that the configuration controller will perform must be known at the time the FPGA is fabricated.